Implementing the Home Alarm System

  Home Alarm System

Problem definition:

Assume that the alarm system to be designed is to be applied on three windows and a door. Each window and the door has a sensor such that when it is opened, it will give logic level 1. There should be an on/off switch for the alarm. If we want to activate the alarm, the switch will give logic level 1. Otherwise, it will give logic level 0.

solution : 

Implementing the combinational circuit for the design problem.

1. Let’s assign binary variables s0, s1, s2, and s3 to each sensor output.
2. Let the on/off switch be represented by the binary variable m.
3. Let’s define the binary variable a as an output. This variable will have logic value 1 when an intruder triggers the alarm. Otherwise, the output of the system will be logic level 0. 

Based on all these constraints, the logic function between the input and output will be

                                            a = (s0 + s1 + s2 + s3) · m.

Circuit diagram of the home alarm system.

Verilog Description of the Home Alarm System:( code:1)

Synthesization result of the home alarm system.

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we can implement home alarm system designs on the Basys3 board.

we provide the Verilog description in which LEDs and switches on the board are connected as the input and output in code 2. Here, we use the Verilog description of the system in code:1 as an IP block.

Home Alarm System Implemented on the Basys3 Board in Verilog code 2

Improving the Home Alarm System

The home alarm system can be improved by using a seven-segment display. When the home alarm system is active, the display will show character A. When it is closed, the display will show character 0 . To do so, we should add a seven-segment display decoder module to the system. This module converts the provided hexadecimal number to the corresponding seven-segment display pattern

We provide the Verilog description of the seven-segment display decoder module. We should form an IP block for this module to be used in the application.

Verilog Description of the Seven-Segment Display Decoder Module code 3

Improved Home Alarm System Implemented on the Basys3 Board in Verilog code 4

We provide the modified Verilog description for the application in code 4. Here, the home alarm system in code 1 is taken as an IP block. Therefore, we assume that the reader has converted it to an IP block and added it to the project.

 Home Alarm System (Using sequential circuits)

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