Digital Safe System

Problem Definition:

We can design a simple digital safe using combinational circuits. Assume that the system has a four-bit predefined password. We will use four switches as the input to the system. If the input matches the predefined password, then the first output will have logic level 1. Otherwise, the second output will have logic level 1.

solution:

We can implement the corresponding combinational circuit using an XOR gate followed by a NOT gate for each bit to be tested. Therefore, if input bit matches the corresponding password bit, then the XOR gate followed by NOT will give logic level 1. If all input bits match corresponding predefined password bits this way, the first output will have logic level 1 and the second output will have logic level 0. The second output will simply be inverse of the first output.

To implement the combinational circuit for the design,

let’s assign binary variables s0, s1, s2, and s3 as input.

Predefined password can be represented as p[0] · · · p[3].

Let’s define the first and second outputs as binary variables l0 and l1, respectively.

The logic function between the inputs and first output variable will be

The second output will be l1 = ~ lo

Circuit diagram of the digital safe system

code:1

Verilog Description of the Digital Safe System code:1

Synthesization result of the digital safe system

we can be seen in this figure, two four-input LUTs are sufficient for implementation.

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Implementing the Digital Safe System on Basys3 board

We can implement the digital safe system on the Basys3 board. In code:2, we provide the Verilog description in which LEDs and switches on the board are connected as the input and output. Here, we use the Verilog description of the system in code:1 as an IP block. Therefore, we expect the reader has generated the corresponding IP block.

code:2

Digital Safe System Implemented on the Basys3 Board in Verilog