STLD-CR24

 

CLICK HERE FOR Unit-1:



UNIT–I

REVIEWOFNUMBERSYSTEMS&CODES:

Representation of numbers of different radix, conversation from one radix to another radix, r- 1’s compliments and r’s compliments of signed members. Gray code ,4 bit codes; BCD,Excess-3, 2421, 84-2-1 code etc. Error detection & correction codes: parity checking, even parity, odd parity, Hamming code.

BOOLEAN THEOREMS AND LOGIC OPERATIONS:

Boolean theorems, principle of complementation & duality, De-morgan theorems. Logic operations;Basiclogicoperations-NOT,OR,AND,UniversalLogicoperations,EX-OR, EX- NOR operations. Standard SOP and POS Forms, NAND-NAND and NOR-NOR realizations, Realization of three level logic circuits.

 UNIT–II 

MINIMIZATIONTECHNIQUES:

MinimizationandrealizationofswitchingfunctionsusingBooleantheorems,K-Map(upto

6 variables)and tabular method(Quine-mccluskey method) with only four variables and single function.

COMBINATIONALLOGICCIRCUITSDESIGN:

Design of Half adder, full adder, half subtractor, full subtractor, applications of full adders; 4- bit adder-subtractor circuit, BCD adder circuit, Excess 3 adder circuit and carry look-a- head adder circuit, Design code converts using Karnaugh method and draw the complete circuit diagrams.

 UNIT–III

COMBINATIONALLOGICCIRCUITSDESIGNUSINGMSI&LSI:

Design of encoder ,decoder, multiplexer and de-multiplexers, Implementation of higher order circuits using lower order circuits . Realization of Boolean functions using decoders and multiplexers.DesignofPriorityencoder,4-bitdigitalcomparatorandsevensegmentdecoder.

INTRODUCTIONOFPLD’s:

PLDs: PROM, PAL, PLA -Basics structures, realization of Boolean functions, Programming table.


UNIT–IV

SEQUENTIALCIRCUITSI:

Classification of sequential circuits (synchronous and asynchronous) , operation of NAND & NOR Latches and flip-flops; truth tables and excitation tables of RS flip-flop, JK flip- flop, T flip-flop, D flip-flop with reset and clear terminals. Conversion from one flip-flop to another flip- flop. Design of 5ripple counters, design of synchronous counters, Johnson counter, ring counter. Design of registers - Buffer register, control buffer register, shift register, bi-directional shift register, universal shift, register

StudythefollowingrelevantICsandtheirrelevantfunctions 7474,7475,7476,7490,7493,74121.

 

UNIT–V

SEQUENTIAL CIRCUITS II:

Finitestatemachine;statediagrams,statetables,reductionofstatetables.Analysisof clockedsequentialcircuitsMealytoMooreconversionandvice-versa.Realizationof sequence generator, Design of Clocked Sequential Circuit to detect the given sequence (with overlapping or without overlapping)

 

TEXTBOOKS:

 

1.  Switching and finite automata theory Zvi.KOHAVI,Niraj.K.Jha 3rdEdition,Cambridge UniversityPress,2009

2.  DigitalDesignbyM.MorrisMano,MichaelDCiletti,4theditionPHIpublication,2008

3.  SwitchingtheoryandlogicdesignbyHillandPeterson,Mc-GrawHillTMHedition,2012.

 

REFERENCES:

 

1.  FundamentalsofLogicDesignbyCharlesH.RothJr,JaicoPublishers,2006

2.  DigitalelectronicsbyRSSedha.S.Chand&companylimited,2010

3.  SwitchingTheoryandLogicDesignbyA.AnandKumar,PHILearningpvtltd,2016.

4.  DigitallogicapplicationsanddesignbyJohnMYarbough,Cengagelearning,2006.

5.  TTL74-Seriesdatabook.

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STLD: UNIT-1

UNIT-1: Representation of numbers of different radix, conversion from one radix to another radix Click Here For    Video Lecture 1 NUMBER CO...