Saturday, March 18, 2023

DICD MID-1 IMP QUESTIONS 2023

 Mid-1 important questions:

Unit-1

 

1.     Explain the various Data Objects supported by VHDL. Give the necessary examples?

2.     Explain the difference in program structure of VHDL and any other procedural language. Give an example.

3.     Explain the program structure of VHDL with the help of block diagram.

4.     With suitable examples explain the various data types supported by VHDL.

5.     Explain the different concurrent statements and sequential statements in VHDL?

6.     Discuss about the comparison between CASE and IF statements in VHDL with examples?

7.     What is the use of library clause and use clause? Give example.

8.     Explain various architectural bodies/modeling styles in VHDL with examples.

9.     Explain the various data types supported by VHDL. Give the necessary examples.

10.  How the package declaration is different from entity declaration? Give the syntax for each?

11.  Define the following terms relevant to Verilog HDL

i)                Parameters iii) Constants

ii)              Keywords iv) identifiers

12.  Write the differences between Verilog and VHDL? Write the Syntax of CASE INVERTOR?

13.  Write a Verilog code for a 4X1 MUX using CASE statement?

14.  List out the data types & Operators available in Verilog HDL. Explain with example.

15.  What are the various data types supported by Verilog HDL? Explain about the predefined data values used for net or variable data type?

16.  Give the syntax for a net declaration? Explain the different kind of nets that belong to the net data type?

 

 

UNIT-II

 

1.     Draw the logic symbol and logic diagram of 74 X 148 priority encoder. Give its truth table and write VHDL code in any one of the model.

2.     Explain the design procedure for multiplexers and de-multiplexers and draw the logic diagram of a 4-to-1 line multiplexer with logic gates.

3.     Give circuit implementation of 4 Bit Ripple adder and Ripple Adder/Subtractor using ones and twos complement method.

4.     Design a Binary to Gray Code converter and write its VHDL code using data flow modeling ?

 

5.     Design the logic circuit for even parity checker and write the behavioral VHDL program?

6.     What is a comparator? Explain the operation of a 2-bit comparator with a relevant diagram. Draw its logic symbol and write a VHDL code.

 

7.     Design the following code converters:

i)                5211 to 2421 ii) 4-bit binary to excess-3

8.     Design a first and second highest priority encoder circuit using 74LS148 and 74LS138?

9.     Design a 4-bit carry look ahead adder using gates and write data flow VHDL program.

10.  Design a 3-bit comparator using three one bit comparators and logic gates.

11.  What is multiplexer? Draw the logic diagram of 8 to 1 line multiplexer?

12.  Design a 32 to 1 MUX using 74x151 and 74x139 decoders.

13.  Design a 2 input 4-bit multiplexer. Write the truth table and draw the logic diagram.

14.   Using a process statement write a VHDL source code for 4 to 1 multiplexer.

15.  Draw the logic diagram of 74x283 IC and design a 24-bit ripple adder using the same IC.

16.  Write a VHDL code for four bit parallel adder/subtractor.

  17Design binary to gray code converter are HDL code

 

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