Monday, September 20, 2021

STLD COURSE MATERIAL

    STLD

Course Objectives:

 To solve a typical number base conversion and analyze new error coding techniques.

 Theorems and functions of Boolean algebra and behaviour of logic gates.

 To optimize logic gates for digital circuits using various techniques.

 Boolean function simplification using Karnaugh maps and Quine-McCluskey methods.

 To understand concepts of combinational circuits.

 To develop advanced sequential circuits.

 

UNIT – I

REVIEW OF NUMBER SYSTEMS & CODES: 

Representation of numbers of different radix, -1

conversation from one radix to another radix,-2

 r-1’s compliments and r’s compliments of signed members.-1

BCD CODE:Gray code  ,4 bit codes; BCD, Excess-3, 2421, 84-2-1 code etc-2

Error detection & correction codes: parity checking, even parity, odd parity, Hamming code. -2

BOOLEAN THEOREMS AND LOGIC OPERATIONS:

Boolean theorems, De-morgan theorems, the principle of complementation & duality,.Logic operations; Basic logic operations -NOT, OR, AND, Universal Logic operations, EX-OR, EX- NOR operations. & the pin diagram and obtain truth table for the following relevant ICs 7400,7402,7404,7408,7432,7486, Standard SOP and POS Forms, NAND-NAND and NOR-NOR realizations, Realization of three-level logic circuits.

UNIT – II

MINIMIZATION TECHNIQUES: 

Minimization and realization of switching functions using boolean theorems, K-Map (up to 6 variables), and tabular method(Quine-mccluskey method) with only four variables and a single function.

COMBINATIONAL LOGIC CIRCUITS DESIGN: 

Design of Half adder, full adder, half subtractor, full subtractor, applications of full adders: 4-bit adder-subtractor circuit(PARALLEL BINARY ADDER), BCD adder circuit, Excess 3 adder circuit, carry look-a-head adder circuit, Design code converts using Karnaugh method and draw the complete circuit diagrams-2.

  UNIT – III

COMBINATIONAL LOGIC CIRCUITS DESIGN USING MSI &LSI : 

Design of Decoder Implementation of higher order circuits using lower order circuits . Realization of Boolean functions,Design of MUX ,Implementation of higher order circuits using lower order circuits . Realization of Boolean functions,Design of Decoder Implementation of higher order circuits using lower order circuits . Realization of Boolean functions,Design of MUX ,Implementation of higher order circuits using lower order circuits . Realization of Boolean functions,Design of Priority encoder-1,, 4-bit digital comparator-1, and seven segment decoder, Study the relevant ICs pin diagrams and their functions 7442,7447,7485,74154 .

INTRODUCTION OF PLD’s : 

PLDs-2:PROM-2, PAL-2, PLA-2 -Basics structures, realization of Boolean functions, Programming table.

UNIT – IV

SEQUENTIAL CIRCUITS I: 

Classification of sequential circuits (synchronous and asynchronous) , operation of NAND & NOR Latches and flip-flops, truth tables and excitation tables with reset and clear terminals. of RS flip-flop-1, JK flip-flop-2, T flip-flop &D flip-flop, Conversion from one flip-flop toanother flip- flop,Design of 5ripple counters, design of synchronous counters, Johnson counter, ring counter, 

 Design of registers - Buffer register, control buffer register, shift register, bi-directional shift register, universal shift, register,Study the following relevant ICs and their relevant functions, 7474,7475,7476,7490,7493,74121.

UNIT – V

SEQUENTIAL CIRCUITS II :

Finite state machine; state diagrams, state tables, reduction of state tables Analysis of clocked sequential circuits Mealy to Moore conversion , Realization of sequence generator,Design of Clocked Sequential Circuit to detect the given sequence (with overlapping or withoutoverlapping). 

TEXT BOOKS:

1. Switching and finite automata theory Zvi.KOHAVI,Niraj.K.Jha 3rdEdition,Cambridge UniversityPress,2009

2. Digital Design by M.MorrisMano,Michael D Ciletti,4th edition PHIpublication,2008

3. Switching theory and logic design by Hill and Peterson,Mc-Graw Hill TMH edition, 2012.


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