MID-2 IMPORTANT QUESTIONS UNIT-3,4 & 5

UNIT-3

COMBINATIONAL CKTS:

1. What is encoder? Design octal to binary encoder.
2. Explain the priority encoder with a neat logic diagram.
3. Realize a 3 to 8 decoder using 2 to 4 decoder and other required gates.
4. Design and explain BCD to decimal decoder and draw its logic diagram.
5. What is decoder? Construct 3*8 decoder using logic gates and truth table.
6. Design full adder from 3 to 8 decoder.
7. Explain briefly about seven segment displays.
8. Implement the following Boolean function with a multiplexer , 
•  i) F(A,B,C,D) =∑(1,2,5,8,6,10,12,14)                 ii) F(A,B,C,D) =∑(1,2,5,6,12)
9. Design 8*1 multiplexer using 2*1 multiplexer.
10. Differentiate Demultiplexer and Decoder.
11. Explain how a decoder can be converted into a de-multiplexer with relevant block diagrams and truth tables.
12. Define multiplexer and explain the procedure to implement 32*1 MUX by using 4*1 multiplexers.
13. Implement 64 × 1 multiplexer with four 16 × 1 and one 4 ×1 multiplexer (use only block diagram).
14. Design a 1:8 demultiplexer using two 1:4 demultiplexer.
15. Implement a 64:1 MUX using 16:1 and 4:1 Muxs.
16. Implement f(A,B,C,D) = ∑(0,1,3,5,6,8,9,11,12,13) using 8:1 MUX and explain its procedure.
17. Realize the Boolean function F= Σ(1,2,5,7) using (i) 8x1 multiplexer (ii) 4x1 multiplexer
18. Design 4-bit digital comparator and explain with neat sketch.

PLD's:

1. Derive the PLA programming table for the combinational circuit that squares a 3 bit number.
2. Design a BCD to Excess-3 code converter and implement using suitable PLA.
3. Briefly describe about the programmable logic arrays with suitable diagrams.
4. Explain the merits & demerits of PROM
5. Compare PROM, PLA and PAL.
6. Write a brief note on Architecture of PLDs
7. Tabulate the PLA programming table for the four Boolean functions listed below  A(x,y,z) = Σ (1, 2, 4, 6),    B(x,y,z) = Σ (0, 1, 6, 7),    C(x,y,z) = Σ (2,6),       D(x,y,z) = Σ (1, 2, 3, 5, 7)
8. For the given 3-input, 4-output truth table of a combinations circuit, tabulate the PAL programming table for the circuit.

Inputs Output

    x y z     A B C D

0 0 0     0 1 0 0

0 0 1     1 1 1 1

0 1 0     1 0 1 1

0 1 1     0 1 0 1

1 0 0     1 0 1 0

1 0 1     0 0 0 1

1 1 0     1 1 1 0

1 1 1     0 1 1 1 

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UNIT-4

FF:

1. Explain about types of sequential circuits.
2. Conversion of SR flip-flop to T-flip-flop.
3. What is race around condition and how to avoid it along with circuit diagram.
4. What do you mean by triggering? Explain the various triggering modes with examples.
5. Convert T flip-flop to D flip-flop.
6. Explain the operation of D-flip flop with the help of truth table.
7. Explain the Buffer Register and Control Buffer Register.
8. Explain about master-slave flip-flop in detail.
9. Draw the logic diagram of a JK flip flop and using excitation table. explain its operation.
10. Draw the logic diagram of RS flip flop and explain its operation.
11. Using the method of flip flop conversion carry out the conversion from JK flip flop to D flip flop
12. Explain about Master-slave flip-flop in detail.
13. What is flip-flop? How can be used in sequential circuit and explain in detail.

COUNTER:

1. Draw and explain the logic diagram for a 4-bit binary ripple down counter using positive edge triggered flip-flops.
2. Design a modulo-12 up synchronous counter using T-flip flops and draw the circuit diagram.
3. Explain the basic principles of ripple counter.
4. Design a Mod-6 synchronous counter using J-K flip flops.
5. Design a 4-bit ripple counter using T-flip-flop. Explain using waveforms.
6. Design and explain a 4-bit ring counter using D-flip flops with relevant timing diagrams.
7. Draw the circuit diagram of MOD-10 Counter and explain the operation of it.
8. Design Mod-10 Counter using T Flip-Flops.
9. Design a decade counter using RS flip flops.
10. Draw the circuit diagram of Johnson counter using D-flip-flops and explain its operation with the help of bit pattern.
11. Design a 4 bit ring counter using D flip-flops and explain its operation with the help of bit pattern.

REGISTERS:

1. Explain in detail about shift registers.
2. Explain the Buffer Register and Control Buffer Register.
3. Draw and explain the working of shift right register.
4. Draw a 4-bit bi-directional shift register logic diagram and explain its operation.

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                                                UNIT-5

1. Explain the difference among a truth table, a state table, a characteristic table and an excitation table.
2. Explain the state machine capabilities and limitations in detail.
3. Explain the analysis of clocked sequential circuits.
4. Explain state transition function, finite state model, Terminal state and stronglyconnected machine in finite state machine.
5. Explain about State diagram and State table in sequential circuits.
6. Explain the following related to sequential circuits with suitable examples.                                          a)State diagram      b)State assignment
7. Discuss Moore Machine models of sequential circuits.
8. Distinguish between Meelay & Moore machines
9. Draw and explain Moore circuit.
10. Draw the logic diagram of Meelay and Moore models and also explain their operation with examples
11. Explain the state reduction technique.
12. Explain the minimization procedure for determining the set of equivalent state of aspecified machine M.
13. Explain in detail the Mealy state diagram with one example.
14. Draw the diagram of Mealy type FSM for serial adder.
15. Design a Moore type sequence detector to detect a serial input sequence of 101.
16. Draw the state diagrams of a sequence detector which can detect 101.
17. Draw state diagrams of a sequence detector which can detect 011.
18. Draw state diagrams of a sequence detector which can detect 010.
19. Design a sequence detector that detects the overlapping sequence of 011010
20. Obtain the state table and state diagram for a sequence detector to recognize the occurrence of sequence bits 110 & 001.
21. Discuss the realization of sequence generator with diagram.
22. Design the Clocked Sequential Circuit to detect the given sequence with overlapping.
23. Implement the Sequential Circuit with clock to detect the given sequence without overlapping.
24. Convert the following Mealy machine into a corresponding Moore machine:

25. Reduce the number of states in the state table, and tabulate the reduced state table and give proper assignment

26.

27.CONVERT MOORE MACHINE TO MEALY MACHINE