- Which of the following is used to convert information
from ‘n’ input lines to a maximum of 2ⁿ unique output lines?
a) Encoder
b) Decoder
c) Multiplexer
d) Demultiplexer
Answer: b) Decoder - A priority encoder assigns priority to inputs based on:
a) Input voltage
b) Input position or order
c) Output state
d) Clock signal
Answer: b) Input position or order - A 4-to-1 multiplexer requires how many selection lines?
a) 2
b) 4
c) 8
d) 16
Answer: a) 2 - A demultiplexer performs the inverse operation of a:
a) Encoder
b) Decoder
c) Multiplexer
d) Comparator
Answer: c) Multiplexer - Which component can be used to realize any Boolean
function?
a) Decoder and OR gates
b) Encoder and AND gates
c) Multiplexer and inverter
d) Counter and NAND gates
Answer: a) Decoder and OR gates - In a 7-segment display, the number 8 requires:
a) 4 segments
b) 5 segments
c) 6 segments
d) 7 segments
Answer: d) 7 segments - A 4-bit comparator compares:
a) Two 4-bit numbers
b) Four 1-bit numbers
c) Two 2-bit numbers
d) Four 2-bit numbers
Answer: a) Two 4-bit numbers - The output of an encoder is:
a) Binary code corresponding to active input
b) Decimal value
c) Complement of input
d) None of these
Answer: a) Binary code corresponding to active input - Which device converts binary information from ‘n’
inputs to a maximum of 2ⁿ outputs?
a) Decoder
b) Multiplexer
c) Encoder
d) Demultiplexer
Answer: a) Decoder - PROM stands for:
a) Programmable Read-Only Memory
b) Programmable Random Output Memory
c) Primary Read Output Memory
d) Partial Read-Only Memory
Answer: a) Programmable Read-Only Memory - The main difference between PAL and PLA is:
a) PAL has fixed AND array, PLA has programmable AND array
b) PAL has programmable OR array, PLA has fixed OR array
c) Both have fixed arrays
d) None of the above
Answer: a) PAL has fixed AND array, PLA has programmable AND array - In PLDs, Boolean functions are realized using:
a) Arrays of AND and OR gates
b) Arrays of XOR gates
c) Flip-flops only
d) Multiplexers
Answer: a) Arrays of AND and OR gates - Which of the following can store data permanently?
a) PROM
b) PLA
c) PAL
d) Decoder
Answer: a) PROM - A 3-to-8 decoder has:
a) 3 inputs and 8 outputs
b) 8 inputs and 3 outputs
c) 8 inputs and 8 outputs
d) 3 inputs and 3 outputs
Answer: a) 3 inputs and 8 outputs - The 4-bit comparator output includes signals for:
a) A=B, A>B, A<B
b) A≠B only
c) A≥B only
d) None of the above
Answer: a) A=B, A>B, A<B
UNIT
– IV: Sequential Circuits I
- A flip-flop is a:
a) Combinational circuit
b) Sequential circuit
c) Arithmetic circuit
d) Memoryless device
Answer: b) Sequential circuit - RS flip-flop can have an invalid state when:
a) S=1, R=0
b) S=0, R=1
c) S=1, R=1
d) S=0, R=0
Answer: c) S=1, R=1 - Which flip-flop eliminates the invalid state of RS
flip-flop?
a) JK flip-flop
b) T flip-flop
c) D flip-flop
d) SR latch
Answer: a) JK flip-flop - The characteristic equation of a D flip-flop is:
a) Q(next) = JQ' + K'Q
b) Q(next) = T ⊕ Q
c) Q(next) = D
d) Q(next) = R + S'
Answer: c) Q(next) = D - A T flip-flop toggles its output when:
a) T=0
b) T=1
c) T changes from 0 to 1
d) Clock = 0
Answer: b) T=1 - A ring counter with 4 flip-flops has a sequence of:
a) 4 states
b) 8 states
c) 16 states
d) 2 states
Answer: a) 4 states - A Johnson counter with 4 flip-flops has:
a) 4 states
b) 8 states
c) 10 states
d) 16 states
Answer: b) 8 states - Which counter design has both shift and rotate
capabilities?
a) Johnson counter
b) Ring counter
c) Universal shift register
d) Ripple counter
Answer: c) Universal shift register - A synchronous counter’s flip-flops are triggered:
a) Independently
b) Sequentially
c) Simultaneously
d) Randomly
Answer: c) Simultaneously - Ripple counters are also called:
a) Serial counters
b) Parallel counters
c) Universal counters
d) Decade counters
Answer: a) Serial counters - A shift register stores data in the form of:
a) Parallel bits only
b) Serial bits only
c) Either serial or parallel form
d) None of these
Answer: c) Either serial or parallel form - The operation of a latch is:
a) Clock dependent
b) Asynchronous
c) Synchronous
d) Sequential
Answer: b) Asynchronous - Conversion of one flip-flop to another involves:
a) Modifying input equations
b) Adding more flip-flops
c) Using counters
d) Using registers
Answer: a) Modifying input equations - A bi-directional shift register can shift data:
a) Only left
b) Only right
c) Both left and right
d) Neither left nor right
Answer: c) Both left and right
UNIT
– V: Sequential Circuits II (FSM)
- A finite state machine (FSM) consists of:
a) Combinational logic and memory elements
b) Flip-flops only
c) Counters only
d) Gates only
Answer: a) Combinational logic and memory elements - In a Mealy machine, the output depends on:
a) Present state only
b) Next state only
c) Present state and input
d) Input only
Answer: c) Present state and input - In a Moore machine, the output depends on:
a) Input only
b) Present state only
c) Both input and state
d) Previous output
Answer: b) Present state only - Converting Mealy to Moore machine increases:
a) Number of states
b) Number of inputs
c) Number of outputs
d) None of the above
Answer: a) Number of states - State reduction in FSM is used to:
a) Minimize number of states
b) Increase output states
c) Increase complexity
d) Add redundancy
Answer: a) Minimize number of states - A sequence detector identifies:
a) Specific pattern of bits
b) Parity bits
c) Data errors
d) Counter states
Answer: a) Specific pattern of bits - FSM used for overlapping detection means:
a) Overlapping sequences are ignored
b) Sequences can share bits
c) Each sequence is separate
d) Sequence repeats are invalid
Answer: b) Sequences can share bits - State table includes:
a) Present state, input, next state, output
b) Inputs and outputs only
c) Flip-flop equations
d) Logic diagram
Answer: a) Present state, input, next state, output - Clocked sequential circuits are controlled by:
a) Continuous input
b) Timing pulses
c) Counters
d) Asynchronous signals
Answer: b) Timing pulses - The process of sequence generation uses:
a) FSM
b) Decoder only
c) Encoder only
d) PLA
Answer: a) FSM - A Moore machine can be converted to Mealy machine by:
a) Associating outputs with transitions
b) Adding states
c) Removing inputs
d) Adding delay
Answer: a) Associating outputs with transitions
STLD MID I MCQ
UNIT-I: Review of Number Systems & Codes & Boolean Algebra & Logic Operations
1What is the radix of the hexa decimal number system?
a) 2 b) 8 c) 10 d) 16
Answer: d) 16
2Which code represents each decimal digit with a 4-bit binary code?
a) Gray code b) Excess-3 code c) BCD code d) 2421 code
Answer: c) BCD code
3How is Gray code different from binary code?
a) It uses more bits. b) Adjacent code values differ by only one bit.
c) It is a weighted code. d) It is primarily used for error detection.
Answer: b) Adjacent code values differ by only one bit.
4Which type of parity checking adds a bit to make the total number of 1s even?
a) Odd parity b) Even parity c) Hamming code d) Cyclic Redundancy Check
Answer: b) Even parity
5What is the purpose of Hamming code?
a) Error detection only b) Error correction only
c) Error detection and correction d) Data compression
Answer: c) Error detection and correction
6Which Boolean theorem states that A+(B+C)=(A+B)+C
a) Commutative Law b) Associative Law c) Distributive Law d) De Morgan's Theorem
Answer: b) Associative Law
7The principle of duality in Boolean algebra involves interchanging which operations and constants?
a) AND and OR, 0s and 1s b) NOT and XOR, As and A's
c) NAND and NOR, inputs and outputs d) SOP and POS forms
Answer: a) AND and OR, 0s and 1s
8According to De Morgan's theorem, (A⋅B)′is equivalent to:
a) A′+B′ b) A′⋅B′ c) A+B d) A⋅B
Answer: a) 𝐴′+𝐵′
9Which of the following is considered a universal logic operation?
a) OR b) AND c) NOT d) NAND
Answer: d) NAND
10What is the standard form that represents a Boolean expression as a sum of product terms?
a) POS b) SOP c) NAND-NAND d) NOR-NOR
Answer: b) SOP
11What is the 1's complement of the binary number 10110?
a) 01001 b) 01010 c) 10101 d) 11001
Answer: a) 01001
12What is the 2's complement of the binary number 10110?
a) 01001 b) 01010 c) 10101 d) 11001
Answer: b) 01010
13The Excess-3 code for decimal digit 5 is:
a) 0101 b) 1000 c) 0010 d) 1011
Answer: b) 1000
14How many bits are required to represent a hexadecimal digit?
a) 2 b) 3 c) 4 d) 8
Answer: c) 4
15If a binary number is converted to Gray code, how many bits differ between adjacent code words?
a) All bits b) Two bits c) One bit d) Zero bits
Answer: c) One bit
16Which code is a self-complementing BCD code?
a) 8421 code b) Gray code c) Excess-3 code d) 2421 code
Answer: c) Excess-3 code
17The expression for De Morgan's theorem for OR operation is:
a) (𝐴+𝐵)′=𝐴′⋅𝐵′ b) (𝐴⋅𝐵)′=𝐴′+𝐵′ c) 𝐴+𝐵=𝐵+𝐴 d) 𝐴⋅(𝐵+𝐶)=𝐴⋅𝐵+𝐴⋅𝐶
Answer: a) (𝐴+𝐵)′=𝐴′⋅𝐵′
18Which logic gate outputs a HIGH only when all inputs are HIGH?
a) OR b) NOR c) AND d) XOR
Answer: c) AND
19Which logic gate is obtained by inverting the output of an OR gate?
a) AND b) NAND c) NOR d) XOR
Answer: c) NOR
20What is the main advantage of using NAND-NAND and NOR-NOR realizations?
a) Reduced complexity of circuits b) Easier to implement universal gates
c) Reduced power consumption d) Fewer gates required compared to other realizations
Answer: d) Fewer gates required compared to other realizations
UNIT-II: Minimization Techniques & Combinational Logic Circuits Design
1What is the maximum number of variables a K-Map can efficiently minimize according to the text?
a) 4 b) 5 c) 6 d) 8
Answer: c) 6
2The Quine-McCluskey method is also known as the:
a) Graphical method b) Tabular method
c) Boolean algebra method d) Karnaugh map method
Answer: b) Tabular method
3A Half Adder circuit is used to add:
a) Three binary bits b) Two binary bits
c) Four binary bits d) Multiple binary numbers
Answer: b) Two binary bits
4How many inputs does a Full Adder take?
a) One b) Two c) Three d) Four
Answer: c) Three
5Which circuit is used to find the difference between two single binary digits?
a) Full Adder b) Half Subtractor c) Full Subtractor d) BCD Adder
Answer: b) Half Subtractor
6 A 4-bit adder-subtractor circuit can perform:
a) Only addition b) Only subtraction c) Both addition and subtraction d) Multiplication
Answer: c) Both addition and subtraction
7 What is the primary advantage of a carry look-ahead adder?
a) Reduces power consumption b) Increases propagation delay
c) Reduces propagation delay d) Simplifies circuit design
Answer: c) Reduces propagation delay
8 In K-map minimization, a group of 8 adjacent 1s eliminates how many variables?
a) 1 b) 2 c) 3 d) 4
Answer: c) 3
9 The Quine-McCluskey method is particularly useful for minimizing Boolean functions with:
a) Few variables b) Many variables c) Only two variables d) Only one output
Answer: b) Many variables
10 Which combinational circuit is used to add two BCD numbers?
a) Full Adder b) Ripple Carry Adder c) BCD Adder d) Excess-3 Adder
Answer: c) BCD Adder
11 How many inputs does a Half Subtractor have?
a) 1 b) 2 c) 3 d) 4
Answer: b) 2
12 What is the output of a Half Subtractor?
a) Sum and Carry b) Difference and Borrow
c) Sum and Difference d) Carry and Borrow
Answer: b) Difference and Borrow
13 Which circuit is a modified BCD adder that works with Excess-3 code inputs?
a) Ripple Carry Adder b) Carry Look-Ahead Adder
c) Excess-3 Adder d) Parallel Adder
Answer: c) Excess-3 Adder
14To realize a three-level logic circuit, which forms can be used?
a) Only SOP b) Only POS c) NAND-NAND or NOR-NOR d) Universal gates only
Answer: c) NAND-NAND or NOR-NOR
15 The main goal of minimization techniques in digital logic is to:
a) Increase circuit complexity b) Reduce the number of gates
c) Increase propagation delay d) Use more components
Answer: b) Reduce the number of gates
16 Which method is suitable for minimizing switching functions with up to 6 variables?
a) Quine-McCluskey method b) K-Map
c) Boolean theorems only d) Tabular method only
Answer: b) K-Map
17 What is the sum output of a Half Adder with inputs A and B?
a) 𝐴⋅𝐵 b) 𝐴+𝐵 c) 𝐴⊕𝐵 d) 𝐴′+𝐵′
Answer: c) 𝐴⊕𝐵
18 The carry output of a Half Adder with inputs A and B is:
a) 𝐴⋅𝐵 b) 𝐴+𝐵 c) 𝐴⊕𝐵 d) 𝐴′+𝐵′
Answer: a) 𝐴⋅𝐵
19 The design of a 4-bit adder-subtractor circuit relies on using:
a) Half Adders b) Full Subtractors c) Full Adders d) Universal gates
Answer: c) Full Adders
20 What is the primary characteristic of a combinational logic circuit?
a) Output depends on present and past inputs b) Contains memory elements
c) Output depends only on present inputs d) Used for sequential operations
Answer: c) Output depends only on present inputs
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