Tuesday, September 28, 2021

NOTES UNIT 1: PART 1

Hardware Description Languages (HDL) Two popular HDLs. 

Verilog and VHDL The U.S. Department of Defense funded VHDL Gateway Design Automation developed Verilog to drive the Verilog simulator. In the early 1990s, the electronics industry was forced to contend with the “language wars,” where competing factions in either the VHDL or Verilog camp competed for an engineer’s mindset and desktop. 
    Both languages survived and now coexist, often in the same design flow. Co-Design designed SystemVerilog, initially known as SUPERLOG. After Synopsys acquired Co-Design, SUPERLOG/SystemVerilog was placed in the public domain as well.
     IEEE industry standards –– VHDL is IEEE 1076-2008, Verilog is IEEE 1364-2005 & SystemVerilog is IEEE 1800-2012.

        FPGA boards & software
¥Boards Basys3 & Arty belongs to Xilinx Artix-7 FPGA .
¥Basysy3 has digital peripherals
¥Arty has Arduino Compatible pins

Introduction

An FPGA is itself a digital system composed of basic building blocks.

Therefore, some digital logic background is necessary to understand the FPGA architecture.

To do so, we start with the basics of digital electronics in this

chapter. Then, we explain the architecture of FPGA using abstract building blocks.

As we overview the FPGA architecture in this chapter, we focus on digital system design and implementation philosophy using FPGA.

All digital devices are based on binary representation. In other saying, everything in a digital device is represented in terms of two logic levels as zero and one. In its basic sense, we have two voltage levels to represent a binary digit (either as zero or one). Let’s call these as ground (zero) and supply voltage (VCC). These correspond to binary logic levels zero and one respectively. Therefore, whenever we talk about a bit value as zero or one, we actually mean a voltage level as either ground or supply voltage.







Monday, September 20, 2021

DSD HDL : SYLLABUS :

THIS BLOG IS MENT FOR PROVIDING CONTENTS, CONCEPTS RELATED TO ELECTRONICS AND COMMUNICATION.READER CAN EXPRESS THEIR VIEWS AND DOUBTS IN SUBJECTS. MY AREA OF INTREST SWITCHING THEORY AND LOGIC DESIGN, VHLD PROGRAMMING, VERILOG PROGRAMMING.. I WILL UPDATE REMAINING SOON.... THANK YOU ALL

STLD COURSE MATERIAL

    STLD

Course Objectives:

 To solve a typical number base conversion and analyze new error coding techniques.

 Theorems and functions of Boolean algebra and behaviour of logic gates.

 To optimize logic gates for digital circuits using various techniques.

 Boolean function simplification using Karnaugh maps and Quine-McCluskey methods.

 To understand concepts of combinational circuits.

 To develop advanced sequential circuits.

 

UNIT – I

REVIEW OF NUMBER SYSTEMS & CODES: 

Representation of numbers of different radix, -1

conversation from one radix to another radix,-2

 r-1’s compliments and r’s compliments of signed members.-1

BCD CODE:Gray code  ,4 bit codes; BCD, Excess-3, 2421, 84-2-1 code etc-2

Error detection & correction codes: parity checking, even parity, odd parity, Hamming code. -2

BOOLEAN THEOREMS AND LOGIC OPERATIONS:

Boolean theorems, De-morgan theorems, the principle of complementation & duality,.Logic operations; Basic logic operations -NOT, OR, AND, Universal Logic operations, EX-OR, EX- NOR operations. & the pin diagram and obtain truth table for the following relevant ICs 7400,7402,7404,7408,7432,7486, Standard SOP and POS Forms, NAND-NAND and NOR-NOR realizations, Realization of three-level logic circuits.

UNIT – II

MINIMIZATION TECHNIQUES: 

Minimization and realization of switching functions using boolean theorems, K-Map (up to 6 variables), and tabular method(Quine-mccluskey method) with only four variables and a single function.

COMBINATIONAL LOGIC CIRCUITS DESIGN: 

Design of Half adder, full adder, half subtractor, full subtractor, applications of full adders: 4-bit adder-subtractor circuit(PARALLEL BINARY ADDER), BCD adder circuit, Excess 3 adder circuit, carry look-a-head adder circuit, Design code converts using Karnaugh method and draw the complete circuit diagrams-2.

  UNIT – III

COMBINATIONAL LOGIC CIRCUITS DESIGN USING MSI &LSI : 

Design of Decoder Implementation of higher order circuits using lower order circuits . Realization of Boolean functions,Design of MUX ,Implementation of higher order circuits using lower order circuits . Realization of Boolean functions,Design of Decoder Implementation of higher order circuits using lower order circuits . Realization of Boolean functions,Design of MUX ,Implementation of higher order circuits using lower order circuits . Realization of Boolean functions,Design of Priority encoder-1,, 4-bit digital comparator-1, and seven segment decoder, Study the relevant ICs pin diagrams and their functions 7442,7447,7485,74154 .

INTRODUCTION OF PLD’s : 

PLDs-2:PROM-2, PAL-2, PLA-2 -Basics structures, realization of Boolean functions, Programming table.

UNIT – IV

SEQUENTIAL CIRCUITS I: 

Classification of sequential circuits (synchronous and asynchronous) , operation of NAND & NOR Latches and flip-flops, truth tables and excitation tables with reset and clear terminals. of RS flip-flop-1, JK flip-flop-2, T flip-flop &D flip-flop, Conversion from one flip-flop toanother flip- flop,Design of 5ripple counters, design of synchronous counters, Johnson counter, ring counter, 

 Design of registers - Buffer register, control buffer register, shift register, bi-directional shift register, universal shift, register,Study the following relevant ICs and their relevant functions, 7474,7475,7476,7490,7493,74121.

UNIT – V

SEQUENTIAL CIRCUITS II :

Finite state machine; state diagrams, state tables, reduction of state tables Analysis of clocked sequential circuits Mealy to Moore conversion , Realization of sequence generator,Design of Clocked Sequential Circuit to detect the given sequence (with overlapping or withoutoverlapping). 

TEXT BOOKS:

1. Switching and finite automata theory Zvi.KOHAVI,Niraj.K.Jha 3rdEdition,Cambridge UniversityPress,2009

2. Digital Design by M.MorrisMano,Michael D Ciletti,4th edition PHIpublication,2008

3. Switching theory and logic design by Hill and Peterson,Mc-Graw Hill TMH edition, 2012.


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ECA: COURSE MATERIAL

ELECTRONIC CIRCUIT ANALYSIS
SYLLABUS:


OBJECTIVE
 To familiarize the student with the analysis and design of basic transistor amplifier circuits and their frequency response characteristics, feedback amplifiers, oscillators, large signal amplifiers and tuned amplifiers
 To demonstrate basic understanding of amplifier operation.
 To analyze amplifier circuits using hybrid model.

UNIT - I SINGLE STAGE AMPLIFIERS: Classification of amplifiers, Transistor hybrid model, Analysis of a transistor CE, CB & CC amplifier circuit using simplified h-parameters, Analysis of CE amplifier with emitter resistance and emitter follower. Design of single stage RC coupled amplifier using BJT MULTISTAGE AMPLIFIERS: Distortion in amplifiers, Analysis of cascaded RC coupled BJT amplifier, cascode amplifier, Darlington pair, Coupling schemes-RC coupled amplifier, transformer coupled amplifier, Direct coupled Amplifier, multistage amplifier using JFET

UNIT – II BJT Amplifiers- Frequency Response: Logarithms, Decibels, general frequency considerations, Frequency response of an amplifier Analysis at low and High Frequencies, Hybrid-pi (π) common emitter transistor model, hybrid - π conductances and capacitances, validity of hybrid- π model, variation of hybrid – π parameters, Millers theorem and its dual, the CE short circuit current gain, current gain with resistive load, gain-bandwidth product, emitter follower at high frequencies.

UNIT - III FEEDBACK AMPLIFIERS: Concept of Feedback and types, transfer gain with feedback, general characteristics of negative feedback amplifiers, Effect of negative feedback on amplifiers characteristics, voltage series, current series, current shunt, and voltage shunt feedback amplifiers.
OSCILLATORS: Classification of oscillators, Constituents of an oscillator, Barkhausen criterion, RC phase shift oscillator, Wein-bridge oscillator, Generalized analysis of LC oscillators- Hartley and Colpitts oscillator, Crystal oscillator ,Stability of oscillator, Wein bridge oscillator, Crystal oscillator, frequency stability.UJT relaxation oscillator.

UNIT - IV LARGE SIGNAL AMPLIFIERS: Classification, Distortion in amplifiers, class A large signal amplifiers, transformer coupled class A power amplifier, efficiency of class A amplifier, class B power amplifier, efficiency of class B amplifier, class B push pull amplifier
Complementary symmetry class B push pull amplifiers, class AB push pull amplifier, class C amplifiers, class D amplifier, thermal stability, heat sink.

UNIT - V TUNED AMPLIFIERS: Introduction, classification of tuned amplifiers, small signal tuned amplifier, Effect of cascading single tuned amplifier on bandwidth, Effect of cascading Double tuned amplifier on bandwidth, Staggered tuned amplifier, stability of Tuned Amplifier

TEXT BOOKS: 
1. Integrated Electronics-Jacob Millman and Christos C. Halkias,1991 Ed -2008,TMH.
 2. Electronic Devices and Circuits, B.P Singh, Rekha Singh,Pearson, 2013.

REFERENCE BOOKS:
1. Electronic Circuit Analysis- Rashid, Cengage Lerning, 2013.
2. Electronic Devices and Circuit Theory-Robert L. Boylestad, Louis Nashelsky, 9Ed,2008 PE.
3. Microelectric Circuits-Sedra and Smith-5 Ed., 2009, Oxford University press.
4. Electronic Circuit Analysis-K.LalKishore, 2004, BSP.
5. Electronic Devices and Circuits-S.Salivahanan ,N.Suresh Kumar,A Vallavaraj,2Ed.,2009, TMH.

OUTCOMES
 Design and analyze the DC bias circuitry of BJT and FET.
 Analyze the different types of amplifiers, operation and its characteristics
 Design circuits like amplifiers, oscillators using the transistors diodes and oscillators

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Switching Theory & Logic Design (STLD): VIDEO LECTURES

here you watch all the concepts of STLD via this video links

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Electronics circuit Analysis (ECA): PART :1

Here in this course, we learn Electronics circuit Analysis
TOPIC WISE VIDEO LINKS:
 1. INTRODUCTION:



2. AMPLIFIERS, CAPACITORS ROLE IN AMP, COUPLING SCHEMES



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